JCSE, vol. 9, no. 4, pp.177-189, 2015

DOI: http://dx.doi.org/10.5626/JCSE.2015.9.4.177

Exploiting Static Non-Uniform Cache Architectures for Hard Real-Time Computing

Yiqiang Ding and Wei Zhang
Department of Electrical and Computer Engineering, Virginia Commonwealth University, Richmond, VA, USA

Abstract: High-performance processors using Non-Uniform Cache Architecture (NUCA) are increasingly used to deal with the growing wire delays in multicore/manycore processors. Due to the convergence of high-performance computing with embedded computing, NUCA caches are expected to benefit high-end embedded systems as well. However, for real-time systems that use multicore processors with NUCA caches, it is crucial to bound worst-case execution time (WCET) accurately and safely. In this paper, we developed a WCET analysis approach by considering the effect of static NUCA caches on WCET. We compared the WCET in real-time applications with different topologies of static NUCA caches. Our experimental results demonstrated that the static NUCA cache could improve the worst-case performance of realtime applications using multicore processor compared to the cache with uniform access time.

Keyword: Non-Uniform Cache Architecture; Worst-case execution time; Real-time systems; Multicore processors

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