JCSE, vol. 12, no. 4, pp.170-179, 2018

DOI: http://dx.doi.org/10.5626/JCSE.2018.12.4.170

Exploring the Performance Impact of Emerging Many-Core Architectures on MPI Communication

Joong-Yeon Cho, Hyun-Wook Jin, and Dukyun Nam
Department of Computer Science and Engineering, Konkuk University, Seoul, Korea Division of Supercomputing, Korea Institute of Science and Technology Information (KISTI), Daejeon, Korea

Abstract: As major architectural changes emerge to resolve the scalability issues in many-core processors, it is critical to understand their impact on the performance of parallel programming models and run-time supports. For example, the Intel Xeon Phi KNL processor is equipped with a high-bandwidth memory and deploys a mesh-based processor interconnect. In this paper, we comprehensively analyze the impact of high-bandwidth memory and processor interconnects on the message passing interface (MPI) communication bandwidth. The results show that the bandwidth of MPI intra-node communication can be improved up to 372% by exploiting the high-bandwidth memory. In addition, we show that the bandwidth of MPI inter-node communication can be improved up to 143% with optimal core affinity. Our comprehensive study provides insight into optimization of the performance of MPI communication in emerging manycore architectures.

Keyword: Many-core; MPI; High-bandwidth memory; Processor interconnect; Core affinity

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