JCSE, vol. 14, no. 4, pp.146-153, 2020

DOI: http://dx.doi.org/10.5626/JCSE.2020.14.4.146

VLSI Implementation of Algorithm for Performance Improvement of Minutiae Based Fingerprint Recognition System

Seungmin Jung
School of Information Science and Telecommunication, Hanshin University, Osan, Korea

Abstract: The fingerprint recognition system has a scheme in which the fingerprint sensor and the algorithm are separated. It is ineffective to operate a total fingerprint algorithm with various simple iterations using only the software environment. This paper proposes an effective fingerprint identification system with VLSI (very large scale integration) hardware architecture for Gabor filter and thinning processing. These two steps occupy the largest portion of CPU processing time in minutiae based fingerprint recognition algorithms. In this paper, we analyze the step-by-step operation of the algorithm using an ARM emulator. We implemented a VLSI logic circuit for hardware processing of Gabor filters and thinning in RTL. The logic is also synthesized and the layout is performed based on automatic placement-routing and postsimulation is performed in the 250n 6-metal CMOS process. The result is compared with the data of a conventional study. The proposed circuit is verified to reduce the algorithm processing time by 73%.

Keyword: Fingerprint algorithm; Gabor filter; Thinning; VLSI; Minutiae; Verilog-HDL

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