JCSE, vol. 14, no. 3, pp.89-101, September, 2020

DOI: http://dx.doi.org/10.5626/JCSE.2020.14.3.89

Exploring Time-Predictable and High-Performance Last-Level Caches for Hard Real-Time Integrated CPU-GPU Processors

Xin Wang and Wei Zhang
Department of Electrical and Computer Engineering, Virginia Commonwealth University, Richmond, VA, USA Department of Computer Science and Engineering, University of Louisville, Louisville, KY, USA

Abstract: Time predictability is crucial for hard real-time and safety-critical systems. In an integrated CPU-GPU (graphic processing units) architecture, the shared last-level cache (LLC) can cause a large number of interferences between CPU and GPU LLC accesses with diverse patterns and characteristics, which can significantly impact the performance and time predictability of both CPUs and GPUs. In this paper, we explore cache partitioning, locking, and a combination of them to make the LLC time-predictable for integrated CPU-GPUs while achieving high performance. By evaluating these LLC management approaches, we can provide real-time system developers recommendations on the most effective timepredictable LLC designs for heterogeneous CPU-GPU multicore processors.

Keyword: GPU; Cache partitioning; Cache locking; Real-time systems; Integrated CPU-GPU

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