JCSE, vol. 17, no. 4, pp.161-168, 2023

DOI: http://dx.doi.org/10.5626/JCSE.2023.17.4.161

Implementation of Novel GDI D-Flip-Flop for RTL Design

Seungmin Jung
Division of Software Convergence, Hanshin University, Osan, Korea

Abstract: In this paper, we proposed a small area hybrid D-flip-flop (DFF) circuit based on the gate diffusion input (GDI) technique. The proposed circuit consisted of only 12 MOS transistors compared to CMOS. This circuit was designed to be applied to a standard cell library used for register transfer level (RTL) flow. To compare with CMOS, circuit characteristics were verified through simulation and layout using 1.8 V 180n standard CMOS process parameters. The proposed GDI DFF cell reduced the layout area by less than half while maintaining delay and power compared to CMOS. Characteristics of the implemented circuit are discussed, and simulation results are reported.

Keyword: GDI circuit; D-flip-flop; Layout; Standard cell library; RTL

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